Description: Book is in excellent condition Enhance your knowledge in SystemVerilog with the "SystemVerilog for Verification: A Guide to Learning the Testbench Language Features" textbook by Chris Spear. This hardcover guide, published by Springer in 2006, offers 301 pages of comprehensive and informative content that will help you master the testbench language features of SystemVerilog. The book is written in English and has a length of 9.4 inches, a width of 6.5 inches, and a height of 0.9 inches. It weighs 24.4 Oz and is classified as a textbook under the categories of Books & Magazines, Textbooks, Education & Reference, and Textbooks. Get your hands on this valuable resource and take your SystemVerilog skills to the next level.
Price: 55 USD
Location: Berlin, Massachusetts
End Time: 2024-08-10T18:37:24.000Z
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All returns accepted: ReturnsNotAccepted
Brand: Unbranded
Book Title: SystemVerilog for Verification: A Guide to Learning the Testbenc
MPN: Does not apply
Item Length: 9.4 in
Item Height: 0.9 in
Item Width: 6.5 in
Author: Chris Spear
Publication Name: Systemverilog for Verification : a Guide to Learning the Testbench Language Features
Format: Hardcover
Language: English
Subject: Cad-Cam, Computer Simulation, Electronics / Circuits / General, Hardware / Personal Computers / General, Logic Design
Publisher: Springer
Publication Year: 2006
Type: Textbook
Subject Area: Computers, Technology & Engineering
Item Weight: 24.4 Oz
Number of Pages: 301 Pages
